| F | 08/2024 | The following is a summary of changes made in this revision.- Following changes have
been made in Table 1-8:
- Updated the
decoupling capacitor part number for 2.2 nF.
- Added the
decoupling capacitor part numbers for 1 µF and 47 nF.
- Added a note under Table 1-1 to clarify the VDDI5 power-up sequence.
- Removed instances of
SPI_EN and IO_CFG_INTF pins from Figure 1-6 in JTAG Programming
section as they are not used during JTAG programming.
- Updated Brownout Detection for a
note related to the brownout detection on any PolarFire supply.
|
| E | 11/2023 | The following is a summary of changes made in this revision.- Updated Figure 1 and Figure 2 by changing the power supply name from “VDDIO (MSS
SGMII Bank 5)” to “VDDI5”.
- Revised information
regarding the VDDI5 power supply. See Table 1.
- Changed the number of 47
µF decoupling capacitors to be used for VDDA25 in Table 1-5.
- Updated Figure 1-2 by changing the power supply name from “VDDI Bank 5
(MSS SGMII)” to “VDDI5”.
- Revised a note about GPIO glitch during JTAG programming. See I/O Glitch.
- Substituted Figure 1-5 with a high-quality image.
|
| D | 10/2023 | The following is a summary of changes made in this revision.- Updated Power Supplies as follows:
- Added information
about target impedance.
- Updated Figure 1-1 by adding operating voltage 1.1V to VDDIO (MSS
DDR Bank 6).
- Added a note describing that the 1.1V operating voltage for VDDIO
(MSS DDR Bank 6) is for the LPDDR4 support. Also, added a link to
PolarFire Family Memory Controller
User Guide.
- Updated PolarFire SoC Decoupling Capacitors as follows:
- Added power supply decoupling capacitor details for MPFS460TS -
FCG1152 and MPFS095TS/MPFS025TS - FCS325 devices.
- Updated the power supply decoupling capacitor details for
MPFS250TS/MPFS160TS/MPFS095TS - FCG1152, FCSG536, FCVG484, and
FCVG784 devices.
- Added a note about GPIO glitch during JTAG programming. See I/O Glitch.
- Replaced “VDDSREF” with “VDD_XCVR_CLK” throughout all the decoupling
capacitors tables in PolarFire SoC Decoupling Capacitors.
- Added Table 1-5 and Table 1-6.
- Updated the unused condition of VDDI Bank 5 (MSS SGMII) to 2.5/3.3V in
Figure 1-2.
|
| C | 05/2022 | The following is a summary of changes made in this revision.- In Power Supplies, added a note about power sequencing requirement for I/O
calibration.
- Updated I/O Glitch.
- Updated Clocks to highlight regional clock implications while
migrating designs to different device sizes.
- Updated Figure 1-9.
- Added a note about hot
socketing exceptions in Hot Socketing (GPIO Only).
- Added link to PPAT in Clocks for
preferred clock inputs connectivity to PLLs, DLLs, and global clock
network.
- Enabled ‘Ask A Question’ hyperlink for each section in the
document.
|
| B | 10/2021 | The following is a summary of changes made in this revision.- Updated Table 1-9 for power-up and power-down sequencing requirements
for mitigating I/O glitch.
- Added recommended 1 nF,
2.2 nF, 10 nF, and 0.1 µF decoupling capacitors of the 0402 size for the
1 mm package. See Table 7.
- Added more information in new footnotes for VDD and VDDA in Table 1.
- Added footnotes for all
decoupling capacitor tables in PolarFire SoC Decoupling Capacitors to
specify the objective of decoupling capacitors.
|
| A | 01/2021 | The following is a summary of changes made in this revision. |
| 1.0 | — | The first publication of this document. |
