3.4.1 Functions

diag_result_t DIAG_CLK_Frequency (uint32_t sysclock, uint8_t linefreq, uint8_t tolerance)

Implements independent time-slot monitoring to verify the reliability of the system clock (i.e., the system clock should neither be too fast nor too slow). This test uses the AC line frequency to verify proper CPU clock operation. The AC line frequency is measured by using a Zero-Cross Detection (ZCD) circuit that is connected to the input of the Timer1 Gate module.

void DIAG_Timer1GateCustomInterruptHandler (void)

Computes the period value, if the timer overflow has occurred. This routine is called from theTimer1 Gate Interrupt Service Routine (ISR), where the Clock Line Frequency Diagnostic Test API updates the period value of the reference line frequency signal. The Pulse Found flag is setin the ISR and entered once the test is in progress. Once the ten values are updated, the code will stop saving the value of the pulses and exit the ISR.