25.5.2 CLKRCLK

Clock Reference Clock Selection Register
Name: CLKRCLK
Address: 0x03B

Bit 76543210 
     CLK[3:0] 
Access R/WR/WR/WR/W 
Reset 0000 

Bits 3:0 – CLK[3:0] CLKR Clock Selection

Table 25-2. Clock Reference Module Clock Sources
CLK Clock Source
1111 CLC8_OUT
1110 CLC7_OUT
1101 CLC6_OUT
1100 CLC5_OUT
1011 CLC4_OUT
1010 CLC3_OUT
1001 CLC2_OUT
1000 CLC1_OUT
0111 NCO1_OUT
0110 EXTOSC
0101 SOSC
0100 MFINTOSC (31.25 kHz)
0011 MFINTOSC (500 kHz)
0010 LFINTOSC
0001 HFINTOSC
0000 FOSC