32.9.2 PWMxCLK

Name: PWMxCLK
Address: 0x461,0x470,0x47F

PWMx Clock Source

Bit 76543210 
    CLK[4:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bits 4:0 – CLK[4:0] PWM Clock Source Select

CLKSourceOperates in Sleep
11111 - 10011ReservedN/A
10010CLC8_OUTYes(1)
10001CLC7_OUTYes(1)
10000CLC6_OUTYes(1)
01111CLC5_OUTYes(1)
01110CLC4_OUTYes(1)
01101CLC3_OUTYes(1)
01100CLC2_OUTYes(1)
01011CLC1_OUTYes(1)
01010NCO1_OUTYes(1)
01001CLKREFYes(1)
01000EXTOSCYes
00111SOSCYes
00110MFINTOSC (31.25 kHz)Yes
00101MFINTOSC (500 kHz)Yes
00100LFINTOSCYes
00011HFINTOSCYes
00010FOSCNo
00001PWMIN1PPSYes(1)
00000PWMIN0PPSYes(1)
Note:
  1. Operation during Sleep is possible if the clock supplying the source peripheral operates in Sleep.