20.3.4 PORTWDF

Signal Routing Port Data Flip Flop Control
Note:
  1. This register can only be written when the clock to the module is disabled. See Signal Routing Port Clock section for details.
Name: PORTWDF
Address: 0x010B

Bit 76543210 
 DF7DF6DF5DF4DF3DF2DF1DF0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 0, 1, 2, 3, 4, 5, 6, 7 – DFn Signal Routing Port Data Flip Flop Enable

Reset States: 
POR/BOR = 00000000
All Other Resets = 00000000
ValueDescription
1 Signal Routing Port input routed through flip-flop to output
0 Signal Routing Port input connected directly to output
This register can only be written when the clock to the module is disabled. See Signal Routing Port Clock section for details.