48.1 Absolute Maximum Ratings(†)

Parameter Rating
Ambient temperature under bias -40°C to +125°C
Storage temperature -65°C to +150°C
Voltage on pins with respect to VSS
  • on VDD pin:
-0.3V to +6.5V
  • on VDDIO2 pin:
-0.3V to +6.5V
  • on MCLR pin:
-0.3V to +9.0V
  • on pins on VDD domain:
-0.3V to (VDD + 0.3V)
  • on pins on VDDIO2 domain:
-0.3V to +6.5V
Maximum current(1)
  • on VSS pin
-40°C ≤ TA ≤ +85°C 140 mA
85°C < TA ≤ +125°C 60 mA
  • on VDD pin (28-pin devices)
-40°C ≤ TA ≤ +85°C 250 mA
85°C < TA ≤ +125°C 85 mA
  • on VDD pin (40-pin devices)
-40°C ≤ TA ≤ +85°C 350 mA
85°C < TA ≤ +125°C 120 mA
  • on VDD pin (48-pin devices)
-40°C ≤ TA ≤ +85°C
85°C < TA ≤ +125°C
  • on VDDIO2 pin
-40°C ≤ TA ≤ +85°C 190 mA
85°C < TA ≤ +125°C 65 mA
  • on pins on the VDD domain
±50 mA
  • on pins on the VDDIO2 domain
±50 mA
Clamp current, IK (VPIN < 0 or VPIN > VDD) ±20 mA
Total power dissipation(2) 800 mW
Note:
  1. Maximum current rating requires even load distribution across I/O pins. Maximum current rating may be limited by the device package power dissipation characterizations. See the Thermal Characteristics section to calculate device specifications.
  2. Power dissipation is calculated as follows:

    PDIS = VDD x {IDD - Σ IOH} + Σ {(VDD - VOH) x IOH} + Σ (VOI x IOL)

  3. Internal Power Dissipation is calculated as follows:

    PINTERNAL = IDD x VDD

    where IDD is current to run the chip alone without driving any load on the output pins.
  4. I/O Power Dissipation is calculated as follows:

    PI/O = Σ(IOL*VOL)+Σ(IOH*(VDD-VOH))

  5. Derated Power is calculated as follows:

    PDER = PDMAX(TJ-TA)/θJA

    where TA = Ambient Temperature, TJ = Junction Temperature.
: Stresses above those listed under the “Absolute Maximum Ratings” section may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure above maximum rating conditions for extended periods may affect device reliability.