8.2.6.3.6 DMA Packet Buffer

The DMA uses packet buffers for both transmit and receive paths. This mode allows multiple packets to be buffered in both transmit and receive directions. This allows the DMA to withstand far greater access latencies on the system bus and make more efficient use of the system bus bandwidth. There are two modes of operation—Full Store and Forward and Partial Store and Forward.

As described in section Partial Store and Forward Using Packet Buffer DMA, the DMA can be programmed into a low latency mode, known as Partial Store and Forward.

When the DMA is in Full Store and Forward mode, Full packet buffering provides the possibility to:

• Discard packets with error on the receive path before they are partially written out of the DMA, thus saving system bus bandwidth and driver processing overhead,,
• Retry collided transmit frames from the buffer, thus saving system bus bandwidth,
• Implement transmit IP/TCP/UDP checksum generation offload.

With the packet buffers included, the structure of the GMAC data paths is shown in the figure below.