5.4.4.4 Traffic Balancing Using Outstanding Regulation
Global system performance is significantly impacted when the LCD controller is reading a frame buffer from memory to refresh the LCD screen. To ensure optimal performance, the LCD forwards its quality of service to other system bus hosts to limit their usage of the bus. The GFX2D frame rate is limited to allow latency-critical LCD operation.
Use the following procedure to activate traffic balancing:
- Program the GFX2D_GC.REGQOS1, GFX2D_GC.REGQOS2 and GFX2D_GC.REGQOS3 registers and enable the outstanding issuance regulation by setting the GFX2D_GC.REGEN.
- Configure the GFX2D_PCX register, and read the GFX2D_MCX register to adjust the regulation.