8.4.4 Signal Description

Table 8-33. Signal Description for External IOs
Pin NamePin DescriptionType
QSCKSerial clockOutput
MOSI (QIO0)123Data output (data input/output 0)Output (input/output)
MISO (QIO1)123Data input (data input/output 1)Input (input/output)
QIO23Data input/output 2Input/output
QIO33Data input/output 3Input/output
QIO44Data input/output 4Input/output
QIO54Data input/output 5Input/output
QIO64Data input/output 6Input/output
QIO74Data input/output 7Input/output

QCS

Peripheral chip selectOutput
QINTOptional. Interrupt output of an external memory device. Set to 0 if not used.Input
QDQS5678Data strobe (input for read accesses, output for write accesses)Input
Note:
  1. MOSI and MISO are used for Single-bit SPI operation.
  2. QIO0–QIO1 are used for Dual SPI operation.
  3. QIO0–QIO3 are used for Quad SPI operation.
  4. QIO4–QIO7 are used for Octal SPI operation.
  5. QDQS is supplied by most Octal SPI memories.
  6. Pre-cycle is not supported on the QDQS signal.
  7. Preamble bits are not supported on the QDQS signal.
  8. OCTAL SDR with DQS is not supported (QSPI_IFR.DDREN=0, QSPI_IFR.WIDTH=OCT_OUTPUT/OCT_IO/OCT_CMD, QSPI_IFR.DQSEN=1).