7.6.5.10.3 PUF Built-In Self-Test (BIST)

The PUF controller BIST is controlled by the PUF_TEST register.

The BIST is started by writing PUF_TEST.BISTEN=1. Once BIST is started, it cannot be interrupted by other commands (including Zeroize), and it runs until it is finished. The only way to stop it sooner is a PUF reset (refer to the section “Special Function Registers (SFR)”).

The BIST can only be started when PUF_TEST.BISTALLOW=1, which is the case when the PUF controller is in Initialized or Stopped state.

When BISTEN=1 while BISTALLOW=0, the BIST does not start until the BIST is allowed.

After PUF reset, the PUF_TEST.BISTOK and BISTERR flags are both cleared.

When BISTEN=1, the PUF_TEST.BISTACTIVE and BISTRUN flags go to 1 and the BISTOK and BISTERR flags go to 0. When the BIST is finished, BISTACTIVE goes to 0, and both BISTOK and BISTERR go to 1. This proves that the result signals are not stuck at 1 or 0, and that the result is reliable.

The BIST result is only shown after BISTEN=0. Either BISTOK or BISTERR goes to 0, while the other signal stays at 1, depending on the BIST result. When both signals remain at 1, it is also an indication that an error has occurred.

After the BIST is finished and the result is shown, the PUF controller resets, sets PUF_TEST.BISTRUN=0, PUF_SR.BUSY=1, runs the Initialization operation and enters Initialized state. The BIST result remains available.

In case of a BIST error, software must determine what is the next applicable action (e.g. retry BIST to check if the error was transient, zeroize, etc.).

When the BIST operation is performed, a time-out procedure must be included in the calling software. This prevents infinite waiting times in case a PUF controller hardware error prevents the BIST from finishing. At the moment the software time-out occurs, the PUF controller must be reset to stop BIST.