7.8 Register Summary - System Arbiter Control
Address | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|
0x38 | PRLOCK | 7:0 | PRLOCKED | |||||||
0x39 | MAINPR | 7:0 | PR[2:0] | |||||||
0x3A | ISRPR | 7:0 | PR[2:0] | |||||||
0x3B | DMA1PR | 7:0 | PR[2:0] | |||||||
0x3C | DMA2PR | 7:0 | PR[2:0] | |||||||
0x3D | DMA3PR | 7:0 | PR[2:0] | |||||||
0x3E | DMA4PR | 7:0 | PR[2:0] | |||||||
0x3F | SCANPR | 7:0 | PR[2:0] | |||||||
0x40 ... 0x0372 | Reserved | |||||||||
0x0373 | STATUS_CSHAD | 7:0 | TO | PD | N | OV | Z | DC | C | |
0x0374 | WREG_CSHAD | 7:0 | WREG[7:0] | |||||||
0x0375 | BSR_CSHAD | 7:0 | BSR[5:0] | |||||||
0x0376 | Reserved | |||||||||
0x0377 | STATUS_SHAD | 7:0 | TO | PD | N | OV | Z | DC | C | |
0x0378 | WREG_SHAD | 7:0 | WREG[7:0] | |||||||
0x0379 | BSR_SHAD | 7:0 | BSR[5:0] | |||||||
0x037A | PCLAT_SHAD | 7:0 | PCLATH[7:0] | |||||||
15:8 | PCLATU[4:0] | |||||||||
0x037C | FSR0_SHAD | 7:0 | FSRL[7:0] | |||||||
15:8 | FSRH[5:0] | |||||||||
0x037E | FSR1_SHAD | 7:0 | FSRL[7:0] | |||||||
15:8 | FSRH[5:0] | |||||||||
0x0380 | FSR2_SHAD | 7:0 | FSRL[7:0] | |||||||
15:8 | FSRH[5:0] | |||||||||
0x0382 | PROD_SHAD | 7:0 | PROD[7:0] | |||||||
15:8 | PROD[15:8] | |||||||||
0x0384 ... 0x04D7 | Reserved | |||||||||
0x04D8 | STATUS | 7:0 | TO | PD | N | OV | Z | DC | C | |
0x04D9 ... 0x04F2 | Reserved | |||||||||
0x04F3 | PROD | 7:0 | PROD[7:0] | |||||||
15:8 | PROD[15:8] |