16.8.2 Destination Stop

When the Destination Stop bit is set (DSTP = 1) and the DMAxDCNT register reloads, the DMA clears the SIRQEN bit to stop receiving new start interrupt request signals and sets the DMAnDCNTIF flag.

Figure 16-7. GPR-GPR Transactions with Hardware Triggers, DSTP = 1
Note:
  1. SR - Source Read
  2. DW - Destination Write