20.3.5 Interrupts
| Name | Vector Description | Conditions |
|---|---|---|
| OVF | Overflow or underflow interrupt | The counter has reached TOP or BOTTOM |
| CMP0 | Compare Channel 0 interrupt | Match between the counter value and the Compare 0 register |
| CMP1 | Compare Channel 1 interrupt | Match between the counter value and the Compare 1 register |
| CMP2 | Compare Channel 2 interrupt | Match between the counter value and the Compare 2 register |
| Name | Vector Description | Conditions |
|---|---|---|
| LUNF | Low-byte Underflow interrupt | Low byte timer reaches BOTTOM |
| HUNF | High-byte Underflow interrupt | High byte timer reaches BOTTOM |
| LCMP0 | Compare Channel 0 interrupt | Match between the counter value and the low byte of the Compare 0 register |
| LCMP1 | Compare Channel 1 interrupt | Match between the counter value and the low byte of the Compare 1 register |
| LCMP2 | Compare Channel 2 interrupt | Match between the counter value and the low byte of the Compare 2 register |
When an interrupt condition occurs, the corresponding interrupt flag is set in the peripheral’s Interrupt Flags (peripheral.INTFLAGS) register.
An interrupt source is enabled or disabled by writing to the corresponding enable bit in the peripheral’s Interrupt Control (peripheral.INTCTRL) register.
An interrupt request is generated when the corresponding interrupt source is enabled, and the interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral’s INTFLAGS register for details on how to clear interrupt flags.