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tinyAVR® 0-series ATtiny202/204/402/404/406
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8
AVR® CPU
8.7
Register Description
ATtiny202/204/402/404/406
Introduction
Features
1
Silicon Errata and Data Sheet Clarification Document
2
tinyAVR® 0-series Overview
3
Block Diagram
4
Pinout
5
I/O Multiplexing and Considerations
6
Memories
7
Peripherals and Architecture
8
AVR® CPU
8.1
Features
8.2
Overview
8.3
Architecture
8.4
Arithmetic Logic Unit (ALU)
8.5
Functional Description
8.6
Register Summary
8.7
Register Description
8.7.1
Configuration Change Protection
Configuration Change Protection
8.7.2
Stack Pointer
Stack Pointer
8.7.3
Status Register
Status Register
9
NVMCTRL - Nonvolatile Memory Controller
10
CLKCTRL - Clock Controller
11
SLPCTRL - Sleep Controller
12
RSTCTRL - Reset Controller
13
CPUINT - CPU Interrupt Controller
14
EVSYS - Event System
15
PORTMUX - Port Multiplexer
16
PORT - I/O Pin Configuration
17
BOD - Brown-out Detector
18
VREF - Voltage Reference
19
WDT - Watchdog Timer
20
TCA - 16-bit Timer/Counter Type A
21
TCB - 16-Bit Timer/Counter Type B
22
RTC - Real-Time Counter
23
USART - Universal Synchronous and Asynchronous Receiver and Transmitter
24
SPI - Serial Peripheral Interface
25
TWI - Two-Wire Interface
26
CRCSCAN - Cyclic Redundancy Check Memory Scan
27
CCL - Configurable Custom Logic
28
AC - Analog Comparator
29
ADC - Analog-to-Digital Converter
30
UPDI - Unified Program and Debug Interface
31
Instruction Set Summary
32
Conventions
33
Electrical Characteristics
34
Typical Characteristics
35
Ordering Information
36
Package Drawings
37
Errata
38
Data Sheet Revision History
The Microchip Website
Product Change Notification Service
Customer Support
Product Identification System
Microchip Devices Code Protection Feature
Legal Notice
Trademarks
Quality Management System
Worldwide Sales and Service
8.7 Register Description
