6.9 Memory Section Access from CPU and UPDI on Locked Device

The device can be locked so that the memories cannot be read using the UPDI. The locking protects both the Flash (all Boot, Application Code, and Application Data sections), SRAM, and the EEPROM, including the FUSE data. This prevents successful reading of application data or code using the debugger interface. Regular memory access from within the application is still enabled.

The device is locked by writing a non-valid key to the LOCKBIT bit field in FUSE.LOCKBIT.

Table 6-5. Memory Access Unlocked (FUSE.LOCKBIT Valid Key)⁽¹⁾
Memory Section	CPU Access		UPDI Access
Memory Section	Read	Write	Read	Write
SRAM	Yes	Yes	Yes	Yes
Registers	Yes	Yes	Yes	Yes
Flash	Yes	Yes	Yes	Yes
EEPROM	Yes	Yes	Yes	Yes
USERROW	Yes	Yes	Yes	Yes
SIGROW	Yes	No	Yes	No
Other fuses	Yes	No	Yes	Yes

Table 6-6. Memory Access Locked (FUSE.LOCKBIT Invalid Key)⁽¹⁾
Memory Section	CPU Access		UPDI Access
Memory Section	Read	Write	Read	Write
SRAM	Yes	Yes	No	No
Registers	Yes	Yes	No	No
Flash	Yes	Yes	No	No
EEPROM	Yes	Yes	No	No
USERROW	Yes	Yes	No	Yes⁽²⁾
SIGROW	Yes	No	No	No
Other fuses	Yes	No	No	No

Note:

Read operations marked No in the tables may appear to be successful, but the data are not valid. Hence, any attempt of code validation through the UPDI will fail on these memory sections.
In the Locked mode, the USERROW can be written using the Fuse Write command, but the current USERROW values cannot be read out.

Important: The only way to unlock a device is through a CHIPERASE. No application data are retained.

ATtiny202/204/402/404/406

6.9 Memory Section Access from CPU and UPDI on Locked Device