5.1 Multiplexed Signals

Table 5-1. PORT Function Multiplexing, 14 and 20 Pins
VQFN 20-PinSOIC 20-PinSOIC 14-PinPin Name(1,2)Other/SpecialADC0AC0USART0SPI0TWI0TCA0TCB0CCL
191610PA0RESET/UPDIAIN0LUT0-IN0
201711PA1AIN1TxD(3)MOSILUT0-IN1
11812PA2EVOUT0AIN2RxD(3)MISOLUT0-IN2
21913PA3EXTCLKAIN3XCK(3)SCKWO3
32014GND
411VDD
522PA4AIN4XDIR(3)SSWO4LUT0-OUT
633PA5AIN5OUTWO5WO
744PA6AIN6AINN0MOSI(3)(4)
855PA7AIN7AINP0MISO(3)(4)LUT1-OUT
96PB5CLKOUTAIN8AINP1WO2(3)
107PB4AIN9AINN1WO1(3)LUT0-OUT(3)
1186PB3RxDWO0(3)
1297PB2EVOUT1TxDWO2
13108PB1AIN10XCKSDAWO1
14119PB0AIN11XDIRSCLWO0
1512PC0SCK(3)WO(3)
1613PC1MISO(3)(4)LUT1-OUT(3)
1714PC2EVOUT2MOSI(3)(4)
1815PC3SS(3)WO3(3)LUT1-IN0
Note:
  1. Pin names are of type Pxn, with x being the PORT instance (A, B) and n the pin number. The notation for signals is PORTx_PINn. All pins can be used as event input.
  2. All pins can be used for external interrupt, where pins Px2 and Px6 of each port have full asynchronous detection.
  3. Alternate pin positions. For selecting the alternate positions, refer to section PORTMUX - Port Multiplexer.
  4. Alternate pins for SPI MISO and MOSI are respectively at PA7 and PA6 for 14-pin devices and PC1 and PC2 for 20-pin devices.
Table 5-2. PORT Function Multiplexing, Eight Pins
SOIC 8-PinPin Name(1,2)Other/SpecialADC0AC0USART0SPI0TWI0TCA0TCB0CCL
6PA0RESET/UPDIAIN0XDIRSSLUT0-IN0
4PA1AIN1TxD(3)MOSISDAWO1LUT0-IN1
5PA2EVOUT0AIN2RxD(3)MISOSCLWO2LUT0-IN2
7PA3EXTCLKAIN3OUTXCKSCKWO0/WO3
8GND
1VDD
2PA6AIN6AINN0TxDMOSI(3)WO0LUT0-OUT
3PA7AIN7AINP0RxDMISO(3)WO0(3)LUT1-OUT
Note:
  1. Pin names are of type Pxn, with x being the PORT instance (A, B) and n the pin number. Notation for signals is PORTx_PINn. All pins can be used as event inputs.
  2. All pins can be used for external interrupts, where pins Px2 and Px6 of each port have full asynchronous detection.
  3. Alternate pin positions. For selecting the alternate positions, refer to section PORTMUX - Port Multiplexer.