10.5.1 Main Clock Control A
| Name: | MCLKCTRLA |
| Offset: | 0x00 |
| Reset: | 0x00 |
| Property: | Configuration Change Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLKOUT | CLKSEL[1:0] | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bit 7 – CLKOUT System Clock Out
When this bit is written to '1', the system clock is output to the CLKOUT pin. The CLKOUT pin is available for devices with 20 pins or more. See section I/O Multiplexing and Considerations for more information.
Bits 1:0 – CLKSEL[1:0] Clock Select
This bit field selects the source for the Main Clock (CLK_MAIN).
| Value | Name | Description |
|---|---|---|
| 0x0 | OSC20M | 16/20 MHz internal oscillator |
| 0x1 | OSCULP32K | 32.768 kHz internal ultra low-power oscillator |
| 0x2 | Reserved | Reserved |
| 0x3 | EXTCLK | External clock |