Problem Description

When the following is true about a DPLL in freerun or holdover, the DPLL and everything that follows it (other DPLLs, synthesizers, output clocks) experience a frequency jump.

• A REF was the last selected reference for the DPLL before it entered freerun or holdover (or the REF is REF0P when the DPLL has not yet had a selected reference since power-up).
• The configured frequency of the REF is changed from or to a frequency that is not an integer multiple of 0.25 Hz.