39.3.2 Supply Current (IDD)(1,2,4)

Table 39-2. 
PIC18LF67K40 only
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max.UnitsConditions
VDDNote
D100IDDXT4XT = 4 MHz—525700μA3.0V
D100AIDDXT4XT = 4 MHz—325—μA3.0VAll PMD bits are'1'
D101IDDHFO16HFINTOSC = 16 MHz—2.13.0mA3.0V
D101AIDDHFO16HFINTOSC = 16 MHz—1.3—mA3.0VAll PMD bits are'1'
D102IDDHFOPLLHFINTOSC = 64 MHz—8.211mA3.0V
D102AIDDHFOPLLHFINTOSC = 64 MHz—4.8—mA3.0VAll PMD bits are'1'
D103IDDHSPLL64HS+PLL = 64 MHz—8.010mA3.0V
D103AIDDHSPLL64HS+PLL = 64 MHz—4.7—mA3.0VAll PMD bits are'1'
D104IDDIDLEIDLE mode, HFINTOSC = 16 MHz—1.4—mA3.0V
D105IDDDOZE(3)DOZE mode, HFINTOSC = 16 MHz, Doze Ratio = 16—1.5—mA3.0V

Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from 
rail-to-rail; all I/O pins are outputs driven low; MCLR = VDD; WDT disabled.
  2. The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption.
  3. IDDDOZE = [IDDIDLE*(N-1)/N] + IDDHFO16/N where N = DOZE Ratio (see CPUDOZE register).
  4. PMD bits are all in the default state, no modules are disabled.
PIC18F67K40 only
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max.UnitsConditions
VDDNote
D150IDDXT4XT = 4 MHz—575750μA3.0V
D150AIDDXT4XT = 4 MHz—375—μA3.0VAll PMD bits are'1'
D151IDDHFO16HFINTOSC = 16 MHz—2.33.2mA3.0V
D151AIDDHFO16HFINTOSC = 16 MHz—1.4—mA3.0VAll PMD bits are'1'
D152IDDHFOPLLHFINTOSC = 64 MHz—8.512mA3.0V
D152AIDDHFOPLLHFINTOSC = 64 MHz—5.0—mA3.0VAll PMD bits are'1'
D153IDDHSPLL64HS+PLL = 64 MHz—8.311mA3.0V
D153AIDDHSPLL64HS+PLL = 64 MHz—4.8—mA3.0VAll PMD bits are'1'
D154IDDIDLEIDLE mode, HFINTOSC = 16 MHz—1.5—mA3.0V
D155IDDDOZE(3)DOZE mode, HFINTOSC = 16 MHz, Doze Ratio = 16—1.5—mA3.0V

Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from 
rail-to-rail; all I/O pins are outputs driven low; MCLR = VDD; WDT disabled.
  2. The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption.
  3. IDDDOZE = [IDDIDLE*(N-1)/N] + IDDHFO16/N where N = DOZE Ratio (see CPUDOZE register).
  4. PMD bits are all in the default state, no modules are disabled.