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23.11 Register Summary - Registers Associated with
PWM
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
0x00 ... 0x0F9E | Reserved | | | | | | | | | |
| 0x0F9F | PWM7DC | 7:0 | DCL[1:0] | | | | | | |
| 15:8 | DCH[7:0] |
| 0x0FA1 | PWM7CON | 7:0 | EN | | OUT | POL | | | | |
| 0x0FA2 | PWM6DC | 7:0 | DCL[1:0] | | | | | | |
| 15:8 | DCH[7:0] |
| 0x0FA4 | PWM6CON | 7:0 | EN | | OUT | POL | | | | |
0x0FA5 ... 0x0FAC | Reserved | | | | | | | | | |
| 0x0FAD | CCPTMRS0 | 7:0 | | | | | C4TSEL[1:0] | C1TSEL[1:0] |
| 0x0FAE | CCPTMRS1 | 7:0 | | | P7TSEL[1:0] | P6TSEL[1:0] | C5TSEL[1:0] |
