Hardware Features

  • SmartFusion2 SoC FPGA in the FCG1152 package (M2S150TS-1FCG1152, 150K LE).
  • DDR3 synchronous dynamic random access memory (SDRAM) 4x256 MB for storing data. 256 MB for storing the ECC bits.
  • SPI flash memory 1 Gb SPI flash connected to SPI port 0 of the SmartFusion2 MSS. 1 Gb SPI flash connected to SmartFusion2 FPGA fabric.
  • PCI Express Gen 2 x1 interface.
  • One pair SMA connectors for testing the full duplex SerDes channel.
  • Two FMC connectors with HPC/LPC pinout for expansion.
  • PCIe x4 edge connector.
  • RJ45 interface for 10/100/1000 Ethernet.
  • USB micro-AB connector.
  • Headers for I2C, SPI, and GPIOs.
  • FTDI programmer interface to program the external SPI flash.
  • JTAG/SPI programming interface.
  • RVI header for application programming and debug.
  • Embedded trace macro (ETM) cell header for debug.
  • QUAD 2:1 MUX/DEMUX high bandwidth bus switch.
  • Dual in-line package (DIP) switches for user application.
  • Push-button switches and LEDs for demo purposes.
  • Current measurement test points.