18.2 PPS Inputs
Each digital peripheral has a dedicated PPS Peripheral Input Selection (xxxPPS) register with which the input pin to the peripheral is selected. Devices that have 20 leads or less (8/14/16/20) allow PPS routing to any I/O pin, while devices with 28 leads or more allow PPS routing to I/Os contained within two ports (see the PPS Input Selection Table below).
Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.
Input Signal | PPS Input Selection Register | Default Pin Location | ||
---|---|---|---|---|
PIC16F15213/14 | PIC16F15223/24 | PIC16F15243/44 | ||
INT | INTPPS | RA2 | RA2 | RA2 |
T0CKI | T0CKIPPS | RA2 | RA2 | RA2 |
T1CKI | T1CKIPPS | RA5 | RA5 | RA5 |
T1G | T1GPPS | RA4 | RA4 | RA4 |
T2IN | T2INPPS | RA5 | RA5 | RA5 |
CCP1 | CCP1PPS | RA5 | RC5 | RC5 |
CCP2 | CCP2PPS | RA5 | RC3 | RC3 |
SCL1/SCK1 | SSP1CLKPPS(1) | RA1 | RC0 | RB4 |
SDA1/SDI1 | SSP1DATPPS(1) | RA2 | RC1 | RB6 |
SS1 | SS1PPS | RA3 | RC3 | RC6 |
RX1/DT1 | RX1PPS(1) | RA1 | RC5 | RB5 |
TX1/CK1 | TX1PPS(1) | RA0 | RC4 | RB7 |
ADACT | ADACTPPS | RA5 | RC2 | RC2 |
- Bidirectional pin. The corresponding output must select the same pin.