27.1.4 Conversion Clock

The conversion clock source is selected via the ADC Conversion Clock Select (CS) bits. The available clock sources include several derivatives of the system clock (F_OSC), as well as a dedicated internal fixed-frequency clock referred to as the ADCRC.

The time to complete one bit conversion is defined as the T_AD. Refer to Figure 27-2 for complete timing details of the ADC conversion.

For a correct conversion, the appropriate T_AD specification must be met. Refer to the ADC Timing Specifications table in the “Electrical Specifications” chapter for more details. Table 27-1 gives examples of appropriate ADC clock selections.

Important:

With the exception of the ADCRC clock source, any changes in the system clock frequency will change the ADC clock frequency, which may adversely affect the ADC result.
The internal control logic of the ADC operates off of the clock selected by the CS bits. When the CS bits select the ADCRC, there may be unexpected delays in operation when setting the ADC control bits.

Table 27-1. ADC Clock Period (T_AD) for Different Device Frequencies (F_OSC)
ADC Clock Source	CS[2:0]	ADC Clock Period (T_AD) for Different Device Frequencies (F_OSC)
ADC Clock Source	CS[2:0]	32 MHz	20 MHz	16 MHz	8 MHz	4 MHz	1 MHz
F_OSC/2	`‘b000`	62.5 ns⁽²⁾	100 ns⁽²⁾	125 ns⁽²⁾	250 ns⁽²⁾	500 ns⁽²⁾	2.0 µs
F_OSC/4	`‘b100`	125 ns⁽²⁾	200 ns⁽²⁾	250 ns⁽²⁾	500 ns⁽²⁾	1.0 µs	4.0 µs
F_OSC/8	`‘b001`	250 ns⁽²⁾	400 ns⁽²⁾	500 ns⁽²⁾	1.0 µs	2.0 µs	8.0 µs
F_OSC/16	`‘b101`	500 ns⁽²⁾	800 ns⁽²⁾	1.0 µs	2.0 µs	4.0 µs	16.0 µs⁽²⁾
F_OSC/32	`‘b010`	1.0 µs	1.6 µs	2.0 µs	4.0 µs	8.0 µs	32.0 µs⁽²⁾
F_OSC/64	`‘b110`	2.0 µs	3.2 µs	4.0 µs	8.0 µs	16.0 µs⁽²⁾	64.0 µs⁽²⁾
ADCRC	`‘bx11`	1.0 - 6.0^(1,3)
Note: Refer to the “Electrical Specifications” chapter to see the T_AD parameter for the ADCRC source typical T_AD value. These values violate the required T_AD time. The ADC clock period (T_AD) and the total ADC conversion time can be minimized when the ADC clock is derived from the system clock F_OSC. However, the ADCRC oscillator source must be used when conversions are to be performed with the device in Sleep mode.

Figure 27-2. 10-Bit Analog-to-Digital Conversion T_AD Cycles