3.1.2 Implementation Example

Figure 3-1. Correct GND Plane
Figure 3-2. Incorrect GND Plane
Figure 3-3. GND Plane Split Exception

Figure 3-1 depicts a solid/uninterrupted GND plane that stretches all over the board. This is the ideal implementation.

Figure 3-2 shows several cut-outs assigned to a different power supply.

Such arrangement is to be avoided by all means, as it is a proven source of ElectroMagnetic Interference (EMI), therefore prone to failing the EMC compliance tests.

Very small unavoidable plane splits, like the one depicted in Figure 3-3, are permitted if the signals passing the split on an adjacent layer are low speed.