33.8.4 NCOxINC

NCO Increment Register

Note:
  1. The individual bytes in this multibyte register can be accessed with the following register names:
    • NCOxINCU: Accesses the upper byte INC[19:16]
    • NCOxINCH: Accesses the high byte INC[15:8]
    • NCOxINCL: Accesses the low byte INC[7:0].
  2. The logical increment spans NCOxINCU:NCOxINCH:NCOxINCL.
  3. NCOxINC is double-buffered as INCBUF:
    • INCBUF is updated on the next falling edge of NCOxCLK after writing to NCOxINCL
    • NCOxINCU and NCOxINCH will be written prior to writing NCOxINCL.
Name: NCOxINC
Offset: 0x443,0x44B,0x453

Bit 2322212019181716 
     INC[19:16] 
Access R/WR/WR/WR/W 
Reset 0000 
Bit 15141312111098 
 INC[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 INC[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000001 

Bits 19:0 – INC[19:0] Value by which the NCOxACC is increased by each NCO clock

The individual bytes in this multibyte register can be accessed with the following register names: NCOxINCU: Accesses the upper byte INC[19:16] NCOxINCH: Accesses the high byte INC[15:8] NCOxINCL: Accesses the low byte INC[7:0]. The logical increment spans NCOxINCU:NCOxINCH:NCOxINCL. NCOxINC is double-buffered as INCBUF: INCBUF is updated on the next falling edge of NCOxCLK after writing to NCOxINCL NCOxINCU and NCOxINCH will be written prior to writing NCOxINCL.