33.8.2 NCOxCLK
Note:
- PWS applies only when operating in Pulse Frequency mode.
Name: | NCOxCLK |
Offset: | 0x447,0x44F,0x457 |
NCO Input Clock Control Register
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PWS[2:0] | CKS[4:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:5 – PWS[2:0] NCO Output Pulse-Width Select(1)
Value | Description |
---|---|
111 | NCO output is active for 128 input clock periods |
110 | NCO output is active for 64 input clock periods |
101 | NCO output is active for 32 input clock periods |
100 | NCO output is active for 16 input clock periods |
011 | NCO output is active for 8 input clock periods |
010 | NCO output is active for 4 input clock periods |
001 | NCO output is active for 2 input clock periods |
000 | NCO output is active for 1 input clock periods |
Bits 4:0 – CKS[4:0] NCO Clock Source Select
CKS | Clock Source | Active in Sleep | ||
---|---|---|---|---|
Value | NCO1 | NCO2 | NC03 | |
11111-11011 |
Reserved | - | ||
11010 |
CLC8_OUT | No | ||
11001 |
CLC7_out | No | ||
11000 |
CLC6_out | No | ||
10111 |
CLC5_OUT | No | ||
10110 |
CLC4_OUT | No | ||
10101 |
CLC3_out | No | ||
10100 |
CLC2_OUT | No | ||
10011 |
CLC1_OUT | No | ||
10010 |
NCO3_OUT | NCO3_OUT | Reserved | No |
10001 |
NCO2_OUT | Reserved | NCO2_OUT | No |
10000 |
Reserved | NCO1_OUT | NCO1_OUT | No |
01111-01101 |
Reserved | - | ||
01100 |
TU16B_OUT | No | ||
01011 |
TU16A_OUT | No | ||
01010 |
TMR6_OUT | No | ||
01001 |
TMR4_OUT | No | ||
01000 |
TMR2_OUT | No | ||
00111 |
CLKREF | No | ||
00110 |
EXTOSC | Yes | ||
00101 |
SOSC | Yes | ||
00100 |
MFINTOSC | Yes | ||
00011 |
MFINTOSC | Yes | ||
00010 |
LFINTOSC | Yes | ||
00001 |
HFINTOSC | Yes | ||
00000 |
FOSC | No |