43.6.1.2 Channel Context Configuration Example
The code example below illustrates the configuration of four channel contexts.
Configuring Channel Context
void configADCContext(void) { ADCTX =0x00; // Select Context 1 // Configure ADC registers for Context 1 ADLTHL =0x10; // Lower threshold = 1000 ADLTHH =0x27; ADUTHL =0xE8; // Upper threshold = 10,000 ADUTHH =0x03; ADSTPTL =0x00; // Setpoint = 0 ADSTPTH =0x00; ADACCU =0x00; ADRPT =0x10; // Accumulate 16 samples ADPCH =0x00; // PCH ANA0; ADCON1 =0x00; ADCON2 =0x01; // Accumulate_mode ADCON3 =0x04; ADSTAT =0x00; ADREF =0x00; // ADNREF VSS; ADPREF VDD; ADCON0 =0x04; // CONT = 0 ADCTX =0x01; // Select Context 2 // Configure ADC registers for Context 2 ADLTHL =0xF4; // Lower threshold = 500 ADLTHH =0x01; ADUTHL =0x88; // Upper threshold = 5000 ADUTHH =0x13; ADSTPTL =0x00; // Setpoint = 0 ADSTPTH =0x00; ADACCU =0x00; ADRPT =0x20; // Accumulate 32 samples ADPCH =0x01; // PCH ANA1; ADCON1 =0x00; ADCON2 =0x52; // Average_mode; CRS = /32 ADCON3 =0x04; ADSTAT =0x00; ADREF =0x00; // ADNREF VSS; ADPREF VDD; ADCON0 =0x04; // CONT = 0 ADCTX =0x02; // Select Context 3 // Configure ADC registers for Context 3 ADLTHL =0xF4; // Lower threshold = 500 ADLTHH =0x01; ADUTHL =0x88; // Upper threshold = 5000 ADUTHH =0x13; ADSTPTL =0x00; // Setpoint = 0 ADSTPTH =0x00; ADACCU =0x00; ADRPT =0x20; // Accumulate 32 samples ADPCH =0x02; // PCH ANA2; ADCON1 =0x00; ADCON2 =0x53; // Burst_Average mode; CRS = /32 ADCON3 =0x04; ADSTAT =0x00; ADREF =0x00; // ADNREF VSS; ADPREF VDD; ADCON0 =0x04; // CONT = 0 ADCTX =0x03; // Select Context 4 // Configure ADC registers for Context 4 ADLTHL =0x00; ADLTHH =0x00; ADUTHL =0x00; ADUTHH =0x00; ADSTPTL =0x00; ADSTPTH =0x00; ADACCU =0x00; ADRPT =0x04; ADPCH =0x03; // PCH ANA3; ADCON1 =0x00; ADCON2 =0x24; // LPF mode; CRS = 2 ADCON3 =0x57; // Context 4 interrupt always ADSTAT =0x00; ADREF =0x00; // ADNREF VSS; ADPREF VDD; ADCON0 =0x04; // CONT = 0 // Apply to all context ADACT =0x00; // No ACT ADCLK =0x00; // ADCS FOSC/2; ADCON0 =0x84; // Enable ADC PIR2bits.ADCH1IF =0; // Clear interrupt flags PIR2bits.ADCH2IF =0; PIR2bits.ADCH3IF =0; PIR2bits.ADCH4IF =0; PIE2bits.ADCH1IE =1; // Enable Threshold interrupts PIE2bits.ADCH2IE =1; PIE2bits.ADCH3IE =1; PIE2bits.ADCH4IE =1; }
