21.7.1 Control A - Split Mode
| Name: | CTRLA |
| Offset: | 0x00 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RUNSTDBY | CLKSEL[2:0] | ENABLE | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bit 7 – RUNSTDBY Run Standby
1’ to this bit will enable the peripheral to run in Standby
sleep mode.Bits 3:1 – CLKSEL[2:0] Clock Select
These bits select the clock frequency for the timer/counter.
| Value | Name | Description |
|---|---|---|
| 0x0 | DIV1 | fTCA = fCLK_PER |
| 0x1 | DIV2 | fTCA = fCLK_PER/2 |
| 0x2 | DIV4 | fTCA = fCLK_PER/4 |
| 0x3 | DIV8 | fTCA = fCLK_PER/8 |
| 0x4 | DIV16 | fTCA = fCLK_PER/16 |
| 0x5 | DIV64 | fTCA = fCLK_PER/64 |
| 0x6 | DIV256 | fTCA = fCLK_PER/256 |
| 0x7 | DIV1024 | fTCA = fCLK_PER/1024 |
Bit 0 – ENABLE Enable
| Value | Description |
|---|---|
| 0 | The peripheral is disabled |
| 1 | The peripheral is enabled |