8.1 Peripheral Address Map

The address map shows the base address for each peripheral. For complete register description and summary for each peripheral, refer to the respective peripheral sections.

Table 8-1. Peripheral Address Map
Base AddressNameDescription
0x0000VPORTAVirtual Port A
0x0004VPORTBVirtual Port B
0x0008VPORTCVirtual Port C
0x001CGPIOGeneral Purpose I/O registers
0x0030CPUCPU
0x0040RSTCTRLReset Controller
0x0050SLPCTRLSleep Controller
0x0060CLKCTRLClock Controller
0x0080BODBrown-out Detector
0x00A0VREFVoltage Reference
0x0100WDTWatchdog Timer
0x0110CPUINTInterrupt Controller
0x0120CRCSCANCyclic Redundancy Check Memory Scan
0x0140RTCReal-Time Counter
0x0180EVSYSEvent System
0x01C0CCLConfigurable Custom Logic
0x0400PORTAPort A Configuration
0x0420PORTBPort B Configuration
0x0440PORTCPort C Configuration
0x05E0PORTMUXPort Multiplexer
0x0600ADC0Analog-to-Digital Converter
0x0680AC0Analog Comparator 0
0x0800USART0Universal Synchronous Asynchronous Receiver Transmitter 0
0x0820USART1Universal Synchronous Asynchronous Receiver Transmitter 1
0x08A0TWI0Two-Wire Interface
0x08C0SPI0Serial Peripheral Interface
0x0A00TCA0Timer/Counter Type A instance 0
0x0A80TCB0Timer/Counter Type B instance 0
0x0A90TCB1Timer/Counter Type B instance 1
0x0F00SYSCFGSystem Configuration
0x1000NVMCTRLNonvolatile Memory Controller
Table 8-2. System Memory Address Map
Base AddressNameDescription
0x1100SIGROWSignature Row
0x1280FUSEDevice specific fuses
0x128ALOCKBITLock bits
0x1300USERROWUser Row