2 Design Guides

The following guidelines to design the layout are highly recommended in order not to risk failure and unstable oscillator operation.

• The crystal and ceramic resonator oscillator is sensitive to stray capacitance and noise from other signals. It should be placed away from high frequency devices and traces in order to reduce the capacitive coupling between XTAL pins and PCB traces.
• Keep other digital signal lines, especially clock lines and frequently switching signal lines, as far away from the crystal connections as possible. Crosstalk from the digital activities may disturb the small-amplitude sine-shaped oscillator signal.
• The ground connection for the load capacitors should be short and avoid the return currents from USB, RS232, LIN, PWM,… and power lines
• Load capacitors should be low leakage and stable across temperature (NPO or COG type)
• The load capacitors should be placed close to each other
• The load XTAL_IN capacitor should be placed first and closest to the XTAL_IN pin and ground
• Parasitic capacitance will reduce gain margin. Keep this to an absolute minimum. For example typically:
  • XTAL_IN to ground: 1pF
  • XTAL_OUT to ground: 2pF
  • XTAL_IN to XTAL_OUT: 0.5pF

    These values are slightly package dependent.

• Reduce the parasitic capacitance between XTAL_IN and XTAL_OUT pins by routing them as far apart as possible
• A ground area should be placed under the crystal oscillator area. This ground land should be connected to the oscillator ground.
• Connect the external capacitors needed for the crystal and the ceramic resonator operation as well as the crystal housing to the ground plane
• In case there is only one PCB layer, it is recommended to place a guard ring around the oscillator components and to connect it to the oscillator ground pin