26.11 Register Summary - Timer2
| Address | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x031B | Reserved | |||||||||
| 0x031C | T2TMR | 7:0 | T2TMR[7:0] | |||||||
| 0x031D | T2PR | 7:0 | T2PR[7:0] | |||||||
| 0x031E | T2CON | 7:0 | ON | CKPS[2:0] | OUTPS[3:0] | |||||
| 0x031F | T2HLT | 7:0 | PSYNC | CPOL | CSYNC | MODE[4:0] | ||||
| 0x0320 | T2CLKCON | 7:0 | CS[3:0] | |||||||
| 0x0321 | T2RST | 7:0 | RSEL[4:0] | |||||||
0x0322 ... 0x0328 | Reserved | |||||||||
| 0x0329 | T4TMR | 7:0 | T4TMR[7:0] | |||||||
| 0x032A | T4PR | 7:0 | T4PR[7:0] | |||||||
| 0x032B | T4CON | 7:0 | ON | CKPS[2:0] | OUTPS[3:0] | |||||
| 0x032C | T4HLT | 7:0 | PSYNC | CPOL | CSYNC | MODE[4:0] | ||||
| 0x032D | T4CLKCON | 7:0 | CS[3:0] | |||||||
| 0x032E | T4RST | 7:0 | RSEL[4:0] | |||||||