23.5.2 CLKRCLK

Clock Reference Clock Selection Register
Name: CLKRCLK
Address: 0x03A

Bit 76543210 
     CLK[3:0] 
Access R/WR/WR/WR/W 
Reset 0000 

Bits 3:0 – CLK[3:0] CLKR Clock Selection

Table 23-2. Clock Reference Module Clock Sources
CLKClock Source
1111 - 1100Reserved
1011CLC4_OUT
1010CLC3_OUT
1001CLC2_OUT
1000CLC1_OUT
0111NCO1_OUT
0110EXTOSC
0101SOSC
0100MFINTOSC (32 kHz)
0011MFINTOSC (500 kHz)
0010LFINTOSC
0001HFINTOSC
0000FOSC