35.4.1 Client Mode Transmit Options

The SDO output of the SPI module in Client mode is controlled by the following:

TXR bit
TRIS bit associated with the SDO pin
Client Select input
Current state of the transmit FIFO

This control is summarized in the following table where TRISxn refers to the bit in the TRIS register corresponding to the pin that SDO has been assigned with PPS, TXR is the Transmit Data Required Control bit, SS is the state of the Client Select input, and TXBE is the transmit FIFO Buffer Empty bit.

Table 35-2. Client Mode Transmit
TRISxn⁽¹⁾	TXR	SS	TXBE	SDO State
`0`	`0`	FALSE	`0`	Drives state determined by LATxn⁽²⁾
`0`	`0`	FALSE	`1`	Drives state determined by LATxn⁽²⁾
`0`	`0`	TRUE	`0`	Outputs the oldest byte in the transmit FIFO Does not remove data from the transmit FIFO
`0`	`0`	TRUE	`1`	Outputs the most recently received byte
`0`	`1`	FALSE	`0`	Drives state determined by LATxn⁽²⁾
`0`	`1`	FALSE	`1`	Drives state determined by LATxn⁽²⁾
`0`	`1`	TRUE	`0`	Outputs the oldest byte in the transmit FIFO Removes transmitted byte from the transmit FIFO Decrements occupancy of transmit FIFO
`0`	`1`	TRUE	`1`	Outputs the most recently received byte Sets the TXUIF bit
`1`	`0`	FALSE	`0`	Tri-stated
`1`	`0`	FALSE	`1`	Tri-stated
`1`	`0`	TRUE	`0`	Tri-stated
`1`	`0`	TRUE	`1`	Tri-stated
`1`	`1`	FALSE	`0`	Tri-stated
`1`	`1`	FALSE	`1`	Tri-stated
`1`	`1`	TRUE	`0`	Outputs the oldest byte in the transmit FIFO Removes transmitted byte from the transmit FIFO Decrements the FIFO occupancy
`1`	`1`	TRUE	`1`	Outputs the most recently received byte Sets the TXUIF bit
Note: TRISxn is the bit in the TRISx register corresponding to the pin to which SDO has been assigned with PPS. LATxn is the bit in the LATx register corresponding to the pin to which SDO has been assigned with PPS.