1 What is DMA?

Direct Memory Access (DMA) is an essential feature allowing specific hardware subsystems to access the system memory (RAM) independently of the central processing unit (CPU). This capability significantly enhances the efficiency and performance of data transfers, particularly in applications requiring the rapid movement of large data volumes, such as multimedia, networking, and storage systems.

The DMA process is managed by a dedicated hardware component known as the DMA controller, which can be integrated into the CPU or exist as a separate chip. The controller typically includes multiple channels, each capable of handling separate data transfer operations, and utilizes registers to store memory addresses, transfer counts, and control information. The primary advantages of the DMA include improved efficiency, faster data transfer rates, and reduced CPU overhead, making it indispensable in applications like audio and video streaming and real-time embedded systems.

Figure 1-1. DMA Block Diagram

Working Principle of DMA

The DMA transfer can be started only when a DMA transfer request is detected. The transfer requests may be software, peripheral, or an event. The DMA operation begins with the CPU initializing the DMA controller, followed by a peripheral device requesting a transfer. The DMA controller then arbitrates between multiple requests, if necessary, and takes control of the system bus to perform the data transfer directly between memory and the peripheral device, thereby freeing the CPU to perform other tasks. Upon completion, the DMA controller notifies the CPU through an interrupt.

Types of Data Transfers in DMA

The DMA data transfers are essential for optimizing system performance by enabling efficient communication between different components. These data transfers are categorized based on the source and destination of the data. It is categorized into the following four categories:

  • Peripheral-to-Memory transfer
  • Memory-to-Peripheral transfer
  • Peripheral-to-Peripheral transfer
  • Memory-to-Memory transfer
Table 1-1. Types of Data Transfers in DMA
TypesSource LocationDestination Location
Peripheral-to-MemoryPeripheralMemory
Memory-to-PeripheralMemoryPeripheral
Peripheral-to-PeripheralPeripheralPeripheral
Memory-to-MemoryMemoryMemory
Note: The SAM E/S/V family of devices does not support Peripheral-to-Peripheral type of data transfer.

The DMA transfer mode can also be categorized based on the size of the data being transferred by the components:

  • Beat transfer: Size of one data bus transfer.
  • Block transfer: Amount of data one transfer descriptor can transfer.
  • Burst transfer: Back-to-back DMA transfer without CPU intervention.
  • DMA transaction: Complete transfer of all data in a linked list of descriptors.
  • Cycle Stealing: The DMA controller interrupts the CPU after every cycle to transfer data.