4.1.2 Special Pinout Considerations

PIC18F57Q84 features a JTAG Boundary Scan peripheral. This peripheral will use pins RA0, RA5, RB3 and RB5 for the JTAG interface, overriding GPIO or other peripheral functions attached to the pins.

The JTAG peripheral is enabled by default. If RA0, RA5, RB3 or RB5 on the PIC18F57Q84 Curiosity Nano are to be used for other functions in an application, the JTAG must be disabled by setting the FJTAGEN bit to 0 in the PIC18F57Q84’s CONFIG2 Configuration Word.