8.10.1 Single-Cycle I/O Registers

The I/O memory ranging from 0x00 to 0x3F can be accessed by a single-cycle CPU instruction using the IN or OUT instruction.

The peripherals available in the single-cycle I/O registers are the following:
  • VPORTx
    • Refer to the I/O Configuration section for further details
  • GPR
    • Refer to the General Purpose Registers section for further details
  • CPU
    • Refer to the AVR® CPU section for further details

The single-cycle I/O registers ranging from 0x00 to 0x1F (VPORTx and GPR) are also directly bit-accessible using the SBI or CBI instruction. In these single-cycle I/O registers, single bits can be checked by using the SBIS or SBIC instruction.

Refer to the Instruction Set Summary section for further details.