5.6 Connectivity/Communication

Universal Synchronous/Asynchronous Serial Receiver and Transmitter (USART)

The PIC16F, PIC18F and PIC32CM MCUs provide highly flexible and robust USART peripherals. All USART variants (EUSART, UART, USART) support buffered communication, interrupt-driven operation, and operation in low-power modes, suitable for a variety of embedded communication needs. The following table provides a comparison of features of the PIC16F, PIC18F, and PIC32CM MCUs.

Table 5-20. PIC16F, PIC18F, and PIC32CM UART Features
Feature	PIC16F EUSART	PIC18F EUSART/UART	PIC32CM SERCOM-USART
Integration	Standalone peripherals: USART EUSART (Enhanced USART)	Standalone peripherals: USART EUSART UART with Protocol Support	Mode in SERCOM (Serial Communications) peripheral
Operation Modes	Full-duplex Half-duplex Synchronous/asynchronous	Full-duplex Half-duplex Synchronous/asynchronous	Full-duplex Half-duplex Synchronous/asynchronous
Protocol/ Standard Support	Varies per device family: RS-232, RS-485 LIN host/client IrDA	Varies per device family: RS-232, RS-485 LIN host/client IrDA DMX DALI	Varies per device family: IrDA® LIN host/client ISO 7816 (smart card) RS-485
Buffer/FIFO	Up to 8 bytes (device-dependent)	Up to 16 bytes (device-dependent)	16-byte transmit/receive FIFO
Baud Rate Generation (BRG)	8-bit or 16-bit BRG	16-bit BRG	16-bit BRG, internal/external clock
Data Bits	8, 9	7, 8, 9	5, 6, 7, 8, 9
Stop Bits	1 or 2 bits	1, 1.5, or 2 bits	1 or 2 bits
Parity	Through firmware using the 9^th bit	Odd, Even, or 9th bit Address Detection	Odd, even, none
Data Order	LSb first	LSb or MSb first Selectable	LSb or MSb first Selectable
Flow Control	N/A	Request-to-Send (RTS) Clear-toSend (CTS)	RTS CTS
DMA Support	N/A	Supported	Supported
Error Detection	Parity Overrun Frame error	Parity Overrun Frame error Checksum Collision	Parity Buffer overflow Frame error Noise filtering Collision detection
Sleep Mode Operation	Supported	–	Supported
Interrupts	TX/RX	TX/RX Errors	Multiple, including FIFO events
Pin Mapping	Flexible	–	Flexible
Baud Rate Range	Up to 1 Mbps (device-dependent)	Up to 2 Mbps (device-dependent)	Up to 6 Mbps or higher (device-dependent)
Auto-Baud Detection	Supported	Supported	Supported
Event System Integration	N/A	N/A	Supported

Serial Peripheral Interface (SPI)

The PIC16F, PIC18F, and PIC32CM MCUs provide SPI peripherals that feature high-speed, full-duplex, synchronous data transfer between microcontrollers and other devices. Both SPIs support host and client modes, allowing communication with a wide range of external devices. The following table provides a comparison of features of the PIC16F, PIC18F and PIC32CM.

Table 5-21. PIC16F, PIC18F, and PIC32CM SPI Features
Feature	PIC16F MSSP	PIC18F MSSP/SPI	PIC32CM SERCOM-SPI
Integration	MSSP (Host Synchronous Serial Port), Stand-alone SPI	MSSP, Stand-alone SPI	Mode in SERCOM peripheral
Data Buffering	One-level TX buffer, Two-level RX buffer	FIFO	One-level TX buffer, Two-level RX buffer, internal FIFO
Host/Client Support	Supported	Suported	Supported
Data Width	8 bits (standard) 16 bits	8 bits (standard) 16 bits	8/16 bits (configurable)
Bit Rate/Clock Speed	Up to 10 MHz	Up to 20 MHz	Up to 24 MHz
SPI Modes Supported	All four SPI modes	All four SPI modes	All four SPI modes
Data Order	MSb first	LSb or MSb first	LSb or MSb first
DMA Support	N/A	Supported	Supported
Framed SPI/FSYNC	Hardware-controlled through Client Select (SS) pin	Hardware-controlled through SS pin	Hardware-controlled FSYNC
0-bit Extension	N/A	N/A	Supported
Wake-up from Idle	Supported	Supported	Supported
Write Collision Protection	Supported	Supported	Supported
Interrupts	Supported	Supported	Supported
Pin Mapping	Flexible	Flexible	Flexible
Advanced Features	Enhanced buffer, auto-CS, interrupt, 16-bit mode	Enhanced buffer, auto-CS, interrupt, 16-bit mode, advanced error flags, DMA	DMA, Event System, sleepwalking, multi-protocol

Inter-Integrated Circuit (I²C)

The PIC16F/PIC18F MSSP/I²C and the PIC32CM Serial Communication (SERCOM) provide Philips I²C-compatible peripherals for flexible inter-device communication on a shared bus. Both peripherals support host and client modes, standard and fast I²C speeds (up to 1 MHz), multi-host arbitration, and bus error detection. PIC18F also has an Improved I²C (I³C) peripheral that is significantly faster and offers more advanced features, refer to the table, Other PIC16F/PIC18F Features and Peripherals). The following table provides a comparison of the I²C features of the PIC16F, PIC18F, and PIC32CM.

Table 5-22. PIC16F, PIC18F, and PIC32CM I²C Features
Feature	PIC16F MSSP	PIC18F MSSP/I²C	PIC32CM (All Families)
Integration	MSSP (Host Synchronous Serial Port), Stand-alone I²C	MSSP, Stand-alone I²C	Mode in SERCOM peripheral
Host/Client Modes	Supported	Supported	Supported
Addressing	7-bit, 10-bit General call Address masking	7-bit, 10-bit General call Address masking	7-bit, 10-bit General call Address masking Dual address match
Data Buffering	Up to 8 bytes FIFO	Up to 16 bytes FIFO	16-byte internal FIFO
DMA Support	N/A	Supported	Supported
Bus Speeds Supported	100 kHz, 400 kHz	100 kHz, 400 kHz, 1 MHz	100 kHz, 400 kHz, 1 MHz, 3.4 MHz
SMBus/PMBus™ Support	SMBus and PMBus compatible	SMBus and PMBus compatible	SMBus and PMBus compatible
Multi-Host Arbitration	Supported	Supported	Supported
Wake-up from Sleep	Supported (on address match)	Supported (on address match and byte transfer)	Supported (on address match)
Input Filtering	Selectable SDA hold times to assist with bus capacitance	Dedicated pad control with slew rate and threshold selections	Filtered inputs, slew-rate limited outputs
4-Wire Operation	N/A	N/A	Yes (for advanced protocols)
Data Extension	N/A	N/A	32-bit data extension
FIFO	1-byte FIFO	2-byte FIFO	16-byte FIFO
Max Clock Speed	Up to 400 kHz (Fast mode)	Up to 1 MHz (Fast mode Plus) Up to 12.5 MHz (High-Speed I³C)	Up to 3.4 MHz (High-Speed mode)
Event System Integration	N/A	N/A	Supported

Universal Serial Bus (USB)

Some PIC16F, PIC18F, and PIC32CM MCUs offer integrated USB peripherals that comply with USB 2.0 Full-Speed (12 Mbps) device standards, supporting all four endpoint transfer types, endpoint buffering, and low-power operation with suspend/resume features, with minimal CPU intervention and interrupt load. The following table provides a comparison of features of the PIC16F, PIC18F and PIC32CM.

Table 5-23. PIC16F, PIC18F, and PIC32CM USB Features
Feature	PIC16F USB	PIC18F USB	PIC32CM USB
USB Support	USB 2.0 Full-Speed Device	USB 2.0 Full-Speed Device	USB 2.1 (Full-Speed 12 Mbps, Low-Speed 1.5 Mbps) Device, Host, OTG
Host/Device Modes	Device mode	Device mode	Host and Device mode
Host Mode Features	Host-detection	Host-detection	Eight physical pipes Unlimited virtual pipes Feedback endpoint SOF clock output
Endpoint Addresses	8 bidirectional endpoints	16 bidirectional endpoints	8 (16 endpoints: 8 IN, 8 OUT)
Endpoint Transfer Types	Control Interrupt Bulk Isochronous	Control Interrupt Bulk Isochronous	Control Interrupt Bulk Isochronous
Max Payload per Endpoint	Up to 1023	Up to 1023	No endpoint size limitation (typically up to 1023 bytes)
Endpoint Buffering	Dual Access RAM	Dual Access RAM	Internal SRAM, fully configurable
Multi-Packet Transfer	Supported (through software)	Supported (through software)	Supported
Double Buffering	Dual bank (ping-pong)	Dual bank (ping-pong)	Dual bank (ping-pong)
Power Management	Suspend mode Wake-up from sleep	Suspend mode Wake-up from sleep	Suspend/Resume Wake-up from sleep Link Power Management (LPM-L1) support
On-Chip Transceiver	Supported	Supported	Supported
DMA Support	N/A	Supported	Built-in for endpoint data and configuration
Crystal-less Operation	Supported	Supported	Supported
Debug Support	Supported	Supported	N/A
Buffer Size	Up to 64 bytes	Up to 512 bytes	Up to 1 KB+
VBUS/ID Pin Support	N/A	Supported	Supported
USB Classes Supported	CDC, HID	CDC, HID, MSC	CDC, HID, MSC, Audio

Controller Area Network (CAN)

Some of the PIC18F and PIC32CM MCUs offer integrated CAN controllers, enabling connection to CAN networks for automotive and industrial applications. These CAN peripherals support standard CAN 2.0 A/B protocols, provide message filtering, and include error handling and interrupt capabilities. They are designed to offload CAN protocol management from the CPU, improving real-time communication performance. Both variants require an external CAN transceiver for physical layer connectivity.

The following table provides a comparison of the CAN features of the PIC18F and PIC32CM.

Table 5-24. PIC18F and PIC32CM CAN Features
Feature	PIC18F CAN	PIC32CM CAN
CAN Peripherals	CAN, ECAN (Enhanced CAN)	CAN
Protocol Support	CAN 2.0A/B CAN-FD (ISO 11898-1:2015)	CAN 2.0A/B CAN-FD (ISO 11898-1:2015)
Max Data Rate	1 Mbps (CAN 2.0) Up to 8 Mbps (CAN-FD)	1 Mbps (CAN 2.0) 10 Mbps (CAN-FD)
Message Objects/Buffers	Up to 32 buffers/FIFO	Up to 64 RX and 32 TX dedicated buffers Two RX FIFOs
Data Buffer Size	Up to 64 bytes per CAN-FD frame	Up to 64 bytes per CAN-FD frame
Acceptance Filtering	Up to 16 full filters and 3-4 masks (ECAN, CAN FD)	Up to 128 configurable filter elements J1939 filter
Time Stamping	Links to internal Timer1/3/5 through CCP modules	CiA 603 hardware timestamping External Timestamping Unit (TSU)
Loopback/Test Mode	Supported for self-test operations	Programmable loopback test mode
Error Handling	Advanced error management	CAN error logging Advanced error signaling
AUTOSAR/J1939 Optimization	Supported	Supported
Number of CAN Channels	Up to one	Up to two
Power-Down/Debug Support	Low-power Sleep mode Bus activity wake-up with filter	Power-down Debug on CAN support
Host Memory Access	Buffers mapped into SFR memory space	Uses system RAM through AHB (flexible allocation)
Wake Up from Sleep	Supported (CAN bus activity)	Supported (CAN bus activity, event system)
DMA Support	Supported	Supported
Event System Integration	N/A	Supported (event triggers, sleepwalking)