33.2.4 Physical Layer
The PHY layer is the communication interface
between a connected programmer/debugger and the device. The main features of the PHY layer can
be summarized as follows:
- Support for UPDI One-Wire Asynchronous mode, using half-duplex UART communication on the UPDI pin
- Internal baud detection, clock and data recovery on the UART frame
- Error detection (parity, clock recovery, frame, system errors)
- Transmission response generation (ACK)
- Generation of error signatures during operation
- Guard time control