23.3.5 Interrupts

Table 23-5. Available Interrupt Vectors and Sources
Name	Vector Description	Conditions
CAPT	TCB interrupt	Depending on the operating mode. See the description of the CAPT bit in the TCBn.INTFLAG register.
OVF	TCB interrupt	The timer/counter overflows from MAX to BOTTOM.

When an interrupt condition occurs, the corresponding interrupt flag is set in the peripheral’s Interrupt Flags (peripheral.INTFLAGS) register.

An interrupt source is enabled or disabled by writing to the corresponding enable bit in the peripheral’s Interrupt Control (peripheral.INTCTRL) register.

An interrupt request is generated when the corresponding interrupt source is enabled, and the interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral’s INTFLAGS register for details on how to clear interrupt flags.