5 Project MCC Configuration

MCC is a helpful tool of MPLAB® X IDE that offers an improved and flexible architecture to easily configure devices, peripherals and libraries and to generate code. It visualizes components’ dependencies to simplify development and offers easy maintenance by enabling content versioning at the driver level. The code for this application is generated using the MCC, and the following configuration must be made for the main purpose of the solution:

  1. Clock Control
    • Clock source: HFINTOSC
    • HF internal clock: 48 MHz
    • Clock divider: 1
    Figure 5-1. MCC Clock Control Configuration
  2. Configuration Bits
    • WDT Operating Mode: WDT Disabled; SWDTEN ignored
    • The other fields remain default
  3. Pins
    • RA1 – output pin (OPA1)
    • RA2 – output pin (DAC1)
    • RA4 – output pin (CMP1)
    • RA5 – input pin (OPA1+)
    • RB0 – output pin (CCP1)
    • RB3 – input pin (CMP1-)
    • RC7 – output pin (LED)
    Figure 5-2. MCC Pins Configuration
  4. CCP1
    • Enable CCP: On
    • CCP mode: PWM
    • Select timer: Timer 2
    • Duty cycle (%): 17
    • CCPR alignment: Left aligned
    Figure 5-3. MCC CCP1 Configuration
  5. TMR2
    • Timer Dependency Selector: TMR2
    • Enable timer: On
    • Control mode: One Shot
    • Start/Reset option: Software Control One Shot
    • Clock source: FOSC/4
    • Enable clock sync: On
    • Prescaler: 1:1
    • Postscaler: 1:1
    • Timer period (s): 0.000002 (2 μs)
    Figure 5-4. MCC TMR2 Configuration
  6. OPA1
    • Enable OPA: On
    • Enable Charge Pump: On
    • OPA configuration: Unity Gain Buffer
    • Positive channel: OPA1IN+
    • Positive source selection: OPA1IN2+
    • Hardware override: On
    • Override Control High configuration: Peak detect configuration with unity gain feedback
    • Override Control Low configuration: Peak detect configuration with unity gain feedback
    Figure 5-5. MCC OPA1 Configuration
  7. CMP1
    • Enable Comparator: On
    • Enable Synchronous mode: Asynchronous
    • Enable Comparator Hysteresis: 10 mV Comparator Hysteresis
    • Positive input selection: DAC1 OUT
    • Negative input selection: CIN2-
    • Output polarity: Non-inverted
    • Comparator speed: 30 ns speed
    Figure 5-6. MCC CMP1 Configuration
  8. DAC1
    • VDD: 3.3
    • Required Ref (V): 0.08 (80 mV)
    • DAC enable: On
    • DAC Positive Reference Selection: FVR
    • DAC Negative Reference Selection: VSS
    • DAC Output Enable Selection: DACOUT1 enabled and DACOUT2 disabled
    Figure 5-7. MCC DAC1 Configuration
  9. FVR
    • Enable FVR: On
    • FVR_buffer 2 Gain (to other peripherals): 2x
    Figure 5-8. MCC FVR Configuration
  10. TMR1
    • Enable Timer: On
    • Clock source: FOSC
    • Prescaler: 1:1
    • Timer period (s): 5x10-8
    • Period count: 216
    • Enable Gate: On
    • Gate signal source: CMP1OUT
    • Gate polarity: Low
    • Timer Dependency Selection: TMR1
    Figure 5-9. MCC TMR1 Configuration