1 ADC Operation in Automatic Sequencing Mode with DMA Transfer Mode

Automatic sequencing of an Analog-to-Digital Converter (ADC) using Direct Memory Access (DMA) is used to efficiently transfer data from the ADC to memory without involving the CPU for each data transfer.

The process initiates with the configuration of the timer, specifying a sampling period in either milliseconds or seconds. The timer then starts counting from zero to a predefined top value (100 millisecond). When the timer reaches the top value, it triggers the timer (Event Generator), which in turn triggers the ADC (Event User) through the Event System (EVSYS).

The process continues with the ADC configuration, where multiple channels are selected to be sampled in a specific sequence, often defined by setting up a sequence register. The ADC then starts conversions based on a specific trigger source, which, in this case, refers to the timer. Next, the DMA transfer is initiated.

After the DMA transfer is initiated, the converted ADC data from the ADC result register is transferred to the specific location (SRAM). The DMA controller uses the ADC result register as the source, and a specific memory location (SRAM) or buffer as the destination. The number of data transfers (samples) to be moved from the ADC to memory is specified.

Once the ADC is triggered to start the conversion process, the ADC samples the first channel, converts the analog signal to a digital value and stores the result in its result register. The DMA controller fetches the new data available in the ADC result register and transfers it to the specified memory location (SRAM). The ADC proceeds to the next channel in the sequence and repeats the conversion process. At the same time, the DMA continues to transfer each data to the memory location until the maximum number of transfers is reached.