4.3 Results

Some logic analyzer captures are illustrated below to show the eight generated complementary PWM signals, the duty cycles increasing from 0-100%, what happens during fault, and how are the dead time periods looking.
Figure 4-13. Eight PWM Signals with Variable Duty Cycles, Fault Detection Actions and Restoring to Normal Operation After the Fault is Cleared
Figure 4-14. Dead-time Periods Highlighted
Figure 4-15. A More in Depth Look at the Low-side Dead-time Period

A bare metal code example for AVR16EB32 with the same functionality as the one described in this section can be found here:

An MCC-generated code example for AVR16EB32 with the same functionality as the one described in this section can be found here: