Enabling Pattern Generation mode in
the CTRLA register will override the TCE-generated
waveform.
WEX0.CTRLA = WEX_PGM_bm;
Every signal output must be enabled
to be overridden in Pattern Generation mode. Every signal has a one-to-one
relationship with the bits from the PGMOVR
register.
The PGMOUT register holds the pattern
for every signal. It is worth mentioning that every signal has a one-to-one
relationship with the bits from the PGMOUT register. For example, to achieve the
pattern 0xAA, set bits 1, 3, 5, and 7 to high (‘1’) logic in the
PGMOUT
register:
After configuring the WEX in Pattern
Generation mode, the user can toggle each signal state using the PGMOUT
register.
WEX0.PGMOUT = ~WEX0.PGMOUT;
Add a delay to see when the toggling
occurs.
_delay_us(25);
Port A pins 0-7 (PA0-7) are set as
outputs by writing a ‘1’ to the corresponding bits in the Direction
register of the port. These GPIOs are configured only to obtain a visible
output.
The last step for this example is to
enable the TCE module because the source clock that passes from TCE to WEX is needed
to update the defined
patterns.
TCE0.CTRLA = TCE_ENABLE_bm;
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.