AVR64DB28/32/48/64

31.2.2.1 CCL Input Selection MUX

The following peripherals outputs are available as inputs into the CCL LUT.


Value	Input Source	INSEL0[3:0]	INSEL1[3:0]	INSEL2[3:0]
`0x00`	MASK	Masked input
`0x01`	FEEDBACK	LUTn
`0x02`	LINK	LUT[n+1]
`0x03`	EVENTA	EVENTA
`0x04`	EVENTB	EVENTB
`0x05`	INn	LUTn-IN0	LUTn-IN1	LUTn-IN2
`0x06`	ACn	AC0 OUT	AC1 OUT	AC2 OUT
`0x07`	ZCDn	ZCD0 OUT	ZCD1 OUT	ZCD2 OUT
`0x08`	USARTn⁽¹⁾	USART0 TXD	USART1 TXD	USART2 TXD
`0x09`	SPI0⁽²⁾	SPI0 MOSI	SPI0 MOSI	SPI0 SCK
`0x0A`	TCA0	WO0	WO1	WO2
`0x0B`	TCA1	WO0	WO1	WO2
`0x0C`	TCBn	TCB0 WO	TCB1 WO	TCB2 WO
`0x0D`	TCD0	WOA	WOB	WOC

Note:

USART connections to the CCL work only in asynchronous/synchronous USART host mode.
SPI connections to the CCL work only in SPI host mode.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.