26.9.4 NCOxCLK

Note:
  1. PWS applies only when operating in Pulse Frequency mode.
Name: NCOxCLK
Offset: 0x0593

NCO Input Clock Control Register

Bit 76543210 
 PWS[2:0] CKS[3:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bits 7:5 – PWS[2:0] NCO Output Pulse Width Select bits(1)

ValueDescription
111NCO output is active for 128 input clock periods
110NCO output is active for 64 input clock periods
101NCO output is active for 32 input clock periods
100NCO output is active for 16 input clock periods
011NCO output is active for 8 input clock periods
010NCO output is active for 4 input clock periods
001NCO output is active for 2 input clock periods
000NCO output is active for 1 input clock periods

Bits 3:0 – CKS[3:0] NCO Clock Source Select bits

Description
CKSClock Source
1111-1011Reserved
1010CLC4_out
1001CLC3_out
1000CLC2_out
0111CLC1_out
0110CLKR
0101SOSC
0100MFINTOSC (32 kHz)
0011MFINTOSC (500 kHz)
0010LFINTOSC
0001HFINTOSC
0000FOSC
PWS applies only when operating in Pulse Frequency mode.