7.5.5 Halt

The Halt state can be reached after the CPU hits a breakpoint.

A debugger can use halting debug stepping to exit from the Debug state, execute a single instruction and, then, re-enter the Debug state. Halting debug stepping is active when all the following apply:

  • DHCSR.C_DEBUGEN is set to 1, halting debug enabled
  • DHCSR.C_STEP is set to 1, halting stepping enabled
  • The processor is in the Non-debug state

For more details, refer to the ARMv7-M Architecture Reference Manual - ARM DDI 0403E, Debug stepping control using the DHCSR table.

Table 7-7. Reference
StepsCommands
Debug haltWriteD32(DHCSR, (DBGKEY | DHCSR_C_DEBUGEN | DHCSR_C_MASKINTS | DHCSR_C_HALT))