2.4 Memory
SRAM memories are accessed at their address in a memory space for both reads and writes at any granularity (byte, half word or word). No special controller is needed to access the SRAM memory.
Flash memories are accessed for read at their address in memory space. Read granularity is byte, half word or word. FC erases and writes the Flash memories. The Flash memory supports quad-word read (128-bit) and single-word write (32-bit). The page size is 4 KB with 256 words per row and four rows per page.
The FC supports erase for the entire Program Flash Memory (PFM) or page erase for the unprotected pages. It supports the Single Word Program (32-bit), Quad Word Program (128-bit) and row programming with built-in DMA for reading data from SRAM with a four- or eight-word buffer.
- One page is allocated to Factory Test Memory
- One page is allocated to Cal Space (called OTP page)
- One page is allocated to Boot/Device Configuration (BCFG)
- Five pages is allocated to user Boot Code
Each NVR page has write-protect capability. Factory Test Memory is not programmable by the user.
The device memory supports a partial write feature, but using partial write-only that are 1 can be set to 0. The user can erase the entire Flash memory except the OTP and Factory test memory pages using a dedicated FC command.
Refer to the device data sheet for Flash and SRAM memory size and the memory map of a specific device variant.