1.2 Timer Events
The timer of the AVR can be specified to monitor several events. Status flags in the TIMSK register show if an event has occurred. The ATmega328PB can be configured to monitor up to three events for the 8-bit timers TC0 and TC2. It also has three 16-bit timers (TC1, TC3, and TC4) each of them support four events.
Timer Overflow
The timer overflow event causes the Timer Overflow Flag (TOVx) to be set in the Timer Interrupt Flag Register (TIFRn).
Compare Match
In cases where it is not sufficient to monitor a timer overflow, the compare match interrupt can be used. The Output Compare Register (OCRx) can be loaded with a value [0 .. MaxVal] which the TCNTn will be compared against in every timer cycle. When the timer reaches the compare value, the corresponding Output Compare Flag (OCFx) in the TIFRn register is set. The Timer can be configured to clear the count register to zero on a compare match.
Related output pins can be configured to be set, cleared, or toggled automatically on a compare match. This feature is very useful to generate square wave signals of different frequencies. It offers a wide range of possibilities, which makes it possible to implement a DAC. The PWM mode is a special mode which is even better suited for wave generation. See the device datasheet for details.
Input Capture
Timers in AVR have input pins to trigger the input capture event. A signal change at such a pin causes the timer value to be read and saved in the Input Capture Register (ICRx). At the same time the Input Capture Flag (ICFx) in the TIFRn will be set. This is useful to measure the width of external pulses.