3 Theory of Operation

System Configuration

The topology discovery process includes multiple measurement steps, each of which require the participation of the entire mixing segment. One node is designated as the reference node and a separate node is designated as the measured node. During measurement, only these two nodes will transmit signals, which are special signals used only during topology discovery. No other signals, including beacons, may be transmitted by any node on the segment during this time. Each node of the mixing segment network must be configured into its desired mode using an appropriate management protocol. Details of such a protocol are beyond the scope of this document.

Hardware Block Diagram

Topology discovery requires that the Digital PHY and the PMD transceiver use different internal signal routing than during normal operation. Instead, they use the configuration shown in Figure 3-1 where internal signals are routed through a special scrambler, encoder, and serializer used only for topology discovery.

In topology discovery, the transmit path begins with a scrambler. This randomizes the pulse polarity to assist in rejecting noise or erroneous transmissions. After the scrambler, a 1B/2B encoder is followed by a serializer; this combination turns the single pulse into a pair of pulses: either a positive pulse followed by a negative pulse, or a negative pulse followed by a positive pulse. This design prevents baseline wander on the mixing segment.

The receive path contains the complimentary deserializer, decoder and descrambler, as well as a state machine which counts the number of incoming pulses and detects errors. The output of the state machine enters a delay block, which ensures that there is a minimum total internal delay of at least 100 ns. The groups of blocks labeled Digital PHY and Transceiver may be integrated into one physical device such as Microchip’s LAN8670/1/2 Revision D0 or later. Alternatively, the Digital PHY may be implemented in a device separate from the PMD transceiver if the devices are connected according to the OPEN Alliance 10BASE‑T1S PMD Transceiver Interface specification.

Figure 3-1. Block Diagram of a Node During Topology Discovery

Before the start of any measurement, the first 60 pulses are used to train the descrambler in the receiver. If synchronization between the transmitter’s scrambler and the receiver’s descrambler does not occur within this time or if the polarity of an incoming pulse does not match the expected polarity due to noise or error, then the measurement will stop and the status registers will indicate an error.

Distance Measurement

In topology discovery, a reference node transmits a pulse with a fixed length of 40 to 85 ns onto the mixing segment. This fixed length may vary with component number or manufacturer. The measured node detects the leading edge of the pulse and transmits a pulse in return once its internal delay has passed. The reference and measured nodes repeat this process for a configurable amount of time called the measurement duration. The duration can be configured between 1 to 16 ms, with a longer duration increasing the accuracy of the resulting distance calculation.

The internal delays of each node, measured as described in the next section, must be known prior to calculating the actual time delay between the devices. The distance may then be calculated using the duration, the number of pulses received and the internal delays of both nodes:

Equation 3-1. Distance measurement calculation

d i s t [n s] = \frac{\frac{d u r a t i o n [m s] * 10^{6} [\frac{n s}{m s}]}{p u l s e s} - i n t_d l y_r e f [n s] - i n t_d l y_m e a s [n s]}{2}

Note: It is strongly recommended that the reference node is one of the end nodes of the mixing segment, as shown on the cover page. This reduces the probability of signal reflections interfering with the measurement.

Internal Delay

To calculate the time of flight of the signal using the equation above, it is necessary to know the internal delays of each of the participating nodes. Therefore, the internal delay of each participating node is measured before the distance measurement is performed. Measurement of the internal delay is more accurate than relying on a fixed value such as one from a data sheet, since measurement helps account for and eliminate uncertainties due to semiconductor manufacturing variations. Figure 3-2 shows that the internal delay is the time between the first edge of a received pulse (a) to the first edge of the pulse that is transmitted as a response (b). Within a device, this signal path is a loop and the delay around the loop can be measured at any point. To measure its own internal delay, a node will measure the time delay between transmitting consecutive pulses on the TX line. This delay includes all of the blocks shown, including the transmitting path, receiving path and the delay block.

When measuring its own internal delay, the node transmits pulses onto the mixing segment. Instead of waiting for a response from another node, it detects the leading edge of its own transmitted pulse and processes it through the receiver and delay line, automatically generating another pulse. This is repeated for the duration of the measurement while the node counts the number of pulses generated in this manner. The internal delay is calculated from the duration and the number of pulses using Equation 3-2. At the same time, other nodes on the mixing segment can detect the signals transmitted onto the segment, allowing other nodes to count the pulses as well and calculate the internal delay of the transmitting node.

Equation 3-2. Internal delay calculation

i n t_d l y [n s] = \frac{d u r a t i o n [m s] * 10^{6} [\frac{n s}{m s}]}{p u l s e s}

Note: During the measurement, devices react only to the leading edge of a pulse. The receive delay block ensures that there is a minimum total internal delay of at least 100 ns. Since the internal delay of a node is always greater than the maximum pulse width of 85 ns, the exact width of the pulse does not affect the delay measurement.