8.8.5.3.1 Message Digest Example

Considering the following 512-bit message (example given in FIPS 180-2):

“61626380000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018”

The message is written to memory in a Little Endian (LE) system architecture.

Table 8-11. 512-bit Message Memory Mapping
Memory AddressAddress Offset / Byte Lane
0x7 / 63:560x6 / 55:480x5 / 47:400x4 / 39:320x3 / 31:240x2 / 23:160x1 / 15:80x0 / 7:0
0x0000000000080636261
0x008–0x0300000000000000000
0x0381800000000000000

The digest is stored at the memory location pointed at by the ICM_HASH pointer with a Region Offset.

Table 8-12. LE Resulting SHA-160 Message Digest Memory Mapping
Memory AddressAddress Offset / Byte Lane
0x7 / 63:560x6 / 55:480x5 / 47:400x4 / 39:320x3 / 31:240x2 / 23:160x1 / 15:80x0 / 7:0
0x0006a810647363e99a9
0x0086cc2507871253eba
0x0109dd8d09c
Table 8-13. Resulting SHA-256 Message Digest Memory Mapping
Memory AddressAddress Offset / Byte Lane
0x7 / 63:560x6 / 55:480x5 / 47:400x4 / 39:320x3 / 31:240x2 / 23:160x1 / 15:80x0 / 7:0
0x000eacf018fbf1678ba
0x0082322ae5dde404141
0x0109c7a1796a36103b0
0x018ad1500f261ff10b4

Considering the following 1024-bit message (example given in FIPS 180-2):

“6162638000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000018”

The message is written to memory in a Little Endian (LE) system architecture.

Table 8-14. 1024 bits Message Memory Mapping
Memory AddressAddress Offset / Byte Lane
0x7 / 63:560x6 / 55:480x5 / 47:400x4 / 39:320x3 / 31:240x2 / 23:160x1 / 15:80x0 / 7:0
0x0000000000080636261
0x008–0x0700000000000000000
0x0781800000000000000